TM89PL59

1.	Low power dissipation. 
	1.5V/3V operating voltage range.
TM89PL59L	1.5V Power Mode
TM89PL59H	3V Power Mode

2.	Powerful instruction set.
	Binary addition, subtraction, BCD adjustment. BCD can be executed directly in addition/subtraction operations.
	4 bits x 4 bits Multiplier.
	Single-bit manipulation (set, reset, decision for branch).
	Various conditional branches.
	16 initial working registers and manipulators (can be extended to all RAM with Page Mode).
	Look-up Table.
	LCD driver data transfer. 
3.	ROM Capacity(one/two program code)				32/31K x 16 bits.
	Instruction ROM Max. Capacity(one/two program code)	32/31K x 16 bits.
	Table ROM Max. Capacity(one/two program code)		32K/32K x   8 bits.
16/16K   x  16 bits.
4.	RAM Capacity.				6K / 3K / 1.5K    x    4 / 8 / 16 bits.
	LCD Max. Capacity			256 / 128 / 64    x    4 / 8 / 16 bits.
	STACK Max. Capacity		16	               x    16 bits.
	HL/ZR store Max. Capacity		16 / 16	    x    16 bits.
5.	With direct/index addressing mode in data RAM access. 
6.	LCD driver output.
	16 common outputs and 64 segment outputs. 
	1/1 ~ 1/16 Duty can be selected by code option.
	No Bias , 1/2 ~ 1/4 Bias can be selected by code option.
	Single instruction to turn off all segments.
	COM2 ~ 16 can be defined as CMOS or P_open drain type output port by code option.
	External/Internal regulator mode for VL1/2 by code option.
7.	Input/output ports.
	Port IOA	4 pins (with internal pull-low, input signal chattering prevention circuitry). 
	Port IOB	4 pins (with internal pull-low), and can be defined as KI1 ~ 4 by code option.
	Port IOC	4 pins (with internal pull-low, low-level-hold, input signal chattering prevention circuitry).
	Port IOD	4 pins (with internal pull-low, input signal chattering prevention circuitry)
	Port IOE	4 pins (with internal pull-low).
8.	Interrupt function.
	External factors   5   (INT pin, Port IOA, IOC, IOD & KI input).
	Internal factors    5   (Pre-Divider, Timer1, Timer2, Timer3 & RFC).
9.	Built-in EL-light driver.
	ELC, ELP
10.	Built-in Alarm, clock or single tone melody generator.
	BZB, BZ
11.	Built-in resistance to frequency converter.
	CX, CX2, RFC0 ~ 5
12.	Built-in key matrix scanning function.
	KO1 ~ KO16 (Shared with SEG1 ~ 16)
	KI1 ~ KI4 (Can be defined as IOB1 ~ 4 by code option)
13.	Three 6-bit programmable timers with programmable clock source. 
	Read the content at any time
	Merge 2 or 3 timers into one 12-bit or 18-bit timer
	Used as a counter for RFC
14.	Watchdog timer.
15.	Built-in voltage charge halver & pump circuit.
16.	Dual clock operation
	Slow clock oscillation can be defined as X’tal or external RC type oscillator by code option.
	Fast clock oscillation can be defined as 3.58 MHz ceramic resonator, internal R or external R type oscillator by code option.
17.	HALT function.
18.	STOP function.
19.	Built-in Low Battery Detect.
20.	Built-in Low Voltage Reset(2 type).