tenx technology
首頁 產品資訊 RFPLLfor Radio SystemProduct information

TR1001

Data Sheet
DS-TR1001_EV11.pdf

2011/12/30
User manual
Development Documnets
AP Notes

GENERAL DESCRIPTION
The TR1001 is phase-locked loop (PLL) LSIs for digital tuning systems (DTS) All 
functions are controlled through 3 serial bus lines. These LSIs are used to 
configure high-performance digital tuning system.
BLOCK DIAGRAM


FEATURES
1. Optimal for configuring digital tuning systems in high-fi tuners. 
2. Operate at input frequency ranging from 30~150 MHz during FMIN Input . 
3. All functions controlled through 3 serial bus lines. 
4. CMOS structure with operating power supply range of VDD=2.4~3.6V. 
5. 3.6MHz, 4.5MHz, 7.2MHz or 10.8MHz crystal oscillators can be used. 


Please using Adobe Reader XI (11.0) or upward version for view PDF files.
For reading Traditional or Simplified Chinese PDF files, please install Acrobat Asian font packs.
关注十速微官网