TM57MA21B

1. ROM: 2K x 14 bits MTP (Multi Time Programmable ROM)
2. RAM: 184 x 8 bits (MA21B),  96 x 8bit (MA25) – Ref to the MA21B & MA25 comparsion table.
3. STACK: 6 Levels
4. System Oscillation Sources (Fsys)
    . Fast-clock
      - FXT (Fast Crystal): 1 MHz ~ 12 MHz (only MA21B)
      - FIRC (Fast Internal RC): 1.5 / 4 / 6 /12 MHz
      - XRC (External R, External C): 10K~3 MHz (only MA21B)
    . Slow-clock
      - SXT (Slow Crystal): 32768 Hz (only MA21B)
      - XRC (External R, External C): 10 KHz ~ 3 MHz (only MA21B)
      - SIRC (Slow Internal RC): 140 KHz / 35 KHz / 8.75 KHz / 2.2 KHz @VCC=3V
5. Dual System Clock
    . FIRC + SIRC
    . FIRC + SXT
    . FIRC + XRC
    . FXT + SIRC
    . XRC + SIRC
6. Power Saving Operation Mode
    . FAST Mode: Slow-clock can be disabled or enabled, Fast-clock keeps CPU running
    . SLOW Mode: Fast-clock can be disabled or enabled, Slow-clock keeps CPU running
    . IDLE Mode: Fast-clock and CPU stop. Slow-clock, T2, or Wake-up Timer keep running
    . STOP Mode: All Clocks stop, T2 and Wake-up Timer stop
7. 3 Independent Timers
    . Timer0 
      - 8-bit timer divided by 1~256 pre-scaler option, Counter / Interrupt / Stop function
    . Timer1
      - 8-bit timer divided by 1~256 pre-scaler option, Reload / Interrupt / Stop function
      - Overflow and Toggle out
    . T2
      - 15-bit timer with 4 interrupt interval time options
      - IDLE mode wake-up timer or used as one simple 15-bit time base
      - Clock source: Slow-clock (SXT / XRC / SIRC), Fsys/128
8. Interrupt
    . Three External Interrupt pins
      - 2 pins are falling edge wake-up triggered & interrupts
      - 1 pin is rising or falling edge wake-up triggered & interrupt
    . Timer0 / Timer1 / T2 / WKT (wake-up) Interrupts
9. Wake-up (WKT) Timer
    . Clocked by built-in RC oscillator with 4 adjustable interrupt times
      15 ms / 30 ms / 60 ms / 120 ms @VCC=3V
10. Watchdog Timer 
    . Clocked by built-in RC oscillator with 4 adjustable reset times
      - 110 ms / 210 ms / 840 ms / 1680 ms @VCC=5V (TM57MA21B)
      - 125 ms / 250 ms / 1000 ms / 2000 ms @VCC=5V (TM57MA25)
    . Watchdog timer can be disabled/enabled in STOP mode (WDTSTP, R0E.5)
11. 2 Independent PWMs 
    . PWM0: 
      - 8+2 bits, duty-adjustable, period-adjustable controlled PWM 
      - PWM0 clock source: Fast-clock or Fast-clock-pre*, with 1~64 pre-scalers 
    . PWM1:  
      - 8+2 bits, duty-adjustable controlled PWM
      - PWM1 clock source: Fast-clock or Fast-clock-pre* (up to 12 MHz)
      Note: Fast-clock-pre is the original fast clock selected by SYSCFG[9:8], 
               Fast-clock is the divided clock of Fast-clock-pre.
12. 12-bit ADC Converter with 11 input channels and 1 internal reference voltage on ch11
    . Internal reference voltage 1.18V ±8% on channel-11
13. Reset Sources
    . Power On Reset / Watchdog Reset / Low Voltage Reset / External Pin Reset
14. Low Voltage Reset Option: LVR2.0V, LVR2.0 off in STOP mode, LVR2.3V, LVR2.9V
15. Enhanced Power Noise Rejection
16. Operating Voltage:
    . Fsys=1 MHz, 2.0 ~5.5V
    . Fsys=4 MHz, 2.0~5.5V
    . Fsys=8 MHz, 2.0~5.5V
    . Fsys=12 MHz, 2.6~5.5V
17. Operating Temperature Range: -40°C to +85°C
18. Table Read Instruction: 14-bit ROM data lookup table.
19. Instruction set: 38 Instructions
20. Instruction Execution Time
    . 2 oscillation clocks per instruction except branch
21. I/O ports: Maximum 18 programmable I/O pins 
    . Pseudo-Open-Drain Output (PA2~PA0)
    . Open-Drain Output
    . CMOS Push-Pull Output
    . Schmitt Trigger Input with pull-up resistor option
22. Programming connectivity support 5-wire (ISP) or 8-wire program.
23. 14 channels Touch Key
24. Package Types:
    . 20-pin DIP (300 mil), SOP (300 mil); 16/14-pin DIP (300 mil), SOP (150 mil) 
25. Supported EV board on ICE
      EV board: EV2781