FEATURES1. ROM: 1K x 14 bits OTP or 1K x 14 bits TTP™ (Two Time Programmable ROM)
2. RAM: 48 x 8 bits
3. STACK: 4 Levels
4. System Oscillation Sources (Fsys)
. Fast-clock
- FIRC (Fast Internal RC): can be selected to 1/2/4/8 MHz
. Slow-clock
- SIRC (Slow Internal RC):
VDD=5V, SIRC=167 KHz/86 KHz/43 KHz/21 KHz
VDD=3V, SIRC=136 KHz/68 KHz/34 KHz/17 KHz
5. Power Saving Operation Mode
. FAST mode: Slow-clock can be disabled or enabled
. SLOW mode: Fast-clock stops, CPU is running
. Fast Mode and Slow Mode can be chosen by CPUCKS control bit.
. STOP mode: All Clocks stop, Wake-up Timer is disabled or enabled
6. 1 Independent Timers
. Timer0
- 8-bit timer divided by 1~256 pre-scaler option, Counter/Interrupt/Stop function
- Capture – high duty or low duty (pulse width measurement)
- Overflow and Toggle out
7. Interrupt
. Three External Interrupt pins
- 2 pins are falling edge wake-up triggered
- 1 pin is rising or falling edge wake-up triggered
. Timer0/WKT (wake-up) Interrupts
. PWM0/PWMA / ADC Interrupts
8. Wake-up (WKT) Timer
. Clocked by built-in RC oscillator with 4 adjustable Interrupt times
VDD=5V, WKT=0.8 ms/1.5 ms/24 ms/97 ms
VDD=3V, WKT=1.0 ms/2.0 ms/30 ms/120 ms
9. Interrupt
. Three External Interrupt pins
- 2 pins are falling edge wake-up triggered
- 1 pin is rising or falling edge wake-up triggered
. Timer0/WKT (wake-up) Interrupts
. PWM0/PWMA / ADC Interrupts
10. Wake-up (WKT) Timer
. Clocked by built-in RC oscillator with 4 adjustable Interrupt times
VDD=5V, WKT=0.8 ms/1.5 ms/24 ms/97 ms
VDD=3V, WKT=1.0 ms/2.0 ms/30 ms/120 ms
11. Watchdog Timer
. Clocked by built-in RC oscillator with 4 adjustable Reset Time
VDD=5V, WDT=100 ms/200 ms/800 ms/1600 ms
VDD=3V, WDT=123 ms/256 ms/1000 ms/2000 ms
12. 2 Independent PWMs
. PWM0:
- 8-bit with 1~8 pre-scalers, period-adjustable/duty-adjustable/Clear&Hold
- Clock source, PWMCLK, FIRC 8 MHz or 16 MHz
. PWMA:
- 8+2 bits, period-adjustable / duty-adjustable / Clear&Hold
- Clock source, PWMCLK, FIRC 8 MHz or 16 MHz
13. 12-bit ADC converter with 5 input channels
14. Reset Sources
Fsys=4 MHz, 2.2V~5.5V
Fsys=8 MHz, 2.4V~5.5V
Refer to the graph “Fsys Minimum Operating Volt vs. LVR optimized selection” for more details on Characteristic Graphs section.
15. Low Voltage Reset Option: LVR2.1V, LVR2.1V disabled in STOP mode, LVR2.9V
16. Operating Voltage: Low Voltage Reset Level to 5.5V (tested under LVR OFF)
Fsys=4 MHz, 2.2V~5.5V
Fsys=8 MHz, 2.4V~5.5V
17. Enhanced Power Noise Rejection.
18. Operating Temperature Range: -40°C to +85°C
19. Instruction set: 36 Instructions
20. Instruction Execution Time
. 8-pin DIP (300 mil), SOP (300 mil), TSSOP (173 mil)
21. I/O ports: Maximum 6 programmable I/O pins
. Pseudo-Open-Drain Output (PA0/PA1/PA2)
. Open-Drain Output (PA3/PA4, PA7 with internal fixed pull high resistor.)
. CMOS Push-Pull Output (PA0~PA4)
. Schmitt Trigger Input with pull-up resistor option
22. Supported EV board on ICE
EV board: EV2777