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TM89PL39

Data Sheet
DS-TM89PL39_EV10

2026/5/18
User manual

GENERAL DESCRIPTION
1.	Low power dissipation.
	1.5V/3V operating voltage range.
TM89PL39L	1.5V Power Mode
TM89PL39H	3V Power Mode

2.	Powerful instruction set.
	Binary addition, subtraction, BCD. BCD can be executed directly in addition, subtraction.
	4 bits x 4 bits / 16bits x 16bits Multiplier.
	Single-bit manipulation (set, reset, decision for branch).
	Various conditional branches.
	16 initial working registers and manipulators. (can be extended to all RAM by Page Mode)
	Table look-up.
	LCD driver data transfer.
3.	ROM  capacity(one/two/four program code).					63K /31K /15K		x 16 bits.
	Instruction ROM Max. capacity(one/two/four program code)	63K /31K /15K		x 16 bits.
Program Address 8000~83FFh no use.
	Table ROM Max. capacity(one/two/four program code)		62K /32K /16K		x 8 bits.
	Built-in Table ROM Word/Byte Write by Instruction in 3V Power Mode
4.	RAM capacity.					8K /4K /2K		x 4 /8 /16 bits.
	LCD Max. Capacity			256 / 128 / 64    	x 4 /8 /16 bits.(for LCD Read/Write Mode , Data RAM only for LCD Write Only Mode)
	STACK Max. Capacity			16	               		x 16 bits.
	HL/ZR store Max. Capacity		16 / 16	   		x 16 bits.
5.	With direct/index addressing mode in data RAM access.
6.	LCD driver output.
	Max 1024 / 784 LCD dots by 16 / 8 common outputs and 64 / 98 segment outputs for >1/8 Duty / <=1/8 Duty code option.
	Max 64 segment outputs by SEG1~64 for 1/9~1/16Duty code option.
	Max 105 ~ 98 segment outputs by SEG1~64 & SEG1H~42H for 1/1 Duty ~ 1/8 Duty code option.
	1/1 ~ 1/16 Duty can be selected by code option.
	No Bias & 1/2 ~1/4 Bias can be selected by code option.
	Single instruction to turn off all segments.
	COM1~16, SEG1~64, SEG1H~20H,23H~26H can be defined as CMOS or P_open drain type output by code option(CUPN,0 pins no support LED & CMOS & P_open drain type output for SEG64,63/ SEG21H,22H).
	COM1~16 pins can be mirrored to COM16~1 by code option.
	COM1~7,9~16 can be defined as SEG62~56,58~64 for>=1/9duty by code option.
	COM1~16 can be defined as SEG27H~42H for <=1/8duty by code option.
	CUPN,0 can be defined as SEG64,63 / SEG21H,22H (No Support LED & CMOS & P_open drain type output) by code option.
	One of SEG40~43 & SEG1H~4H & SEG23H~26H can be defined as IOB1~4 by code option.
	SEG49~64 can be defined as IOI1~4,IOH1~4,IOG1~4,IOF1~4 by code option.
	SEG1H~4H can be defined as ELC, ELP, BZB, BZ by code option.
	SEG5H~20H can be defined as IOE/I1~4,IOD1~4,IOC1~4,IOA/H1~4 by code option.
	SEG23H~26H can be defined as KI1~4 by code option.
	Built-in regulator mode for VL1/2 by code option.
	Only “Lz” instruction can set LCD for LCD Write Only Mode.
7.	Input/output ports.
	Port IOA	 4 pins (with internal pull-low, input signal chattering prevention circuitry), and can be defined as IOH/SEG17H~20H or CX,RFC0~2 / ELC,ELP,BZB,BZ / SDA,SCL,RXD,TXD by code option.
	Port IOB	 4 pins (with internal pull-low), and can be defined as KI1~4 / SEG23H~26H or SEG40~43 or ELC,ELP,BZB,BZ / SEG1H~4H by code option.
	Port IOC	 4 pins (with internal pull-low, low-level-hold, input signal chattering prevention circuitry), and can be defined as SEG13H~16H by code option.
	Port IOD 4 pins (with internal pull-low, input signal chattering prevention circuitry), and can be defined as SEG9H~12H by code option.
	Port IOE	 4 pins (with internal pull-low), and can be defined as IOI/SEG5H~8H or RFC3~5,CX2 / ELC,ELP,BZB,BZ / SIOX,SIOY,SCK,SSB by code option.
	Port IOF 4 pins (with internal pull-low), and can be defined as SEG61H~64H by code option.
	Port IOG 4 pins (with internal pull-low), and can be defined as SEG57H~60H by code option.
	Port IOH 4 pins (with internal pull-low), and can be defined as SEG53H~56H or IOA/SEG17~20H by code option.
	Port IOI 4 pins (with internal pull-low), and can be defined as SEG49H~52H or IOE/SEG5~8H by code option.
8.	Interrupt function.
	External factors	5 (INT pin, SIO, Port IOA, IOC, IOD & KI input).
	Internal factors	5 (Pre-Divider, Timer1, Timer2, Timer3 & RFC).
9.	Built-in EL-light driver.
	ELC, ELP. Can be defined as SEG1H,2H / IOB1, 2 or CX,RFC0 / IOA1,2 / SDA,SDL or RFC3,4/IOE1,2/MOSI,MISO  by option.
10.	Built-in Alarm, clock or single tone melody generator.
	BZB, BZ. Can be defined as SEG3H,4H / IOB3, 4 or RFC2,3/IOA3,4/RXD,TXD or RFC5,CX2/IOE3,4/SCK/SSB by option.
11.	Built-in resistance to frequency converter.
	CX,RFC0~2  Can be defined as SEG24~27/IOA1~4 or IOA1~4/ELC,ELP,BZB,BZ / SDA,SCL,RXD,TXD  by code option.
	RFC3~5,CX2  Can be defined as IOE1~4/ELC,ELP,BZB,BZ/SIOX,SIOY,SCK,SSB by code option.
12.	Built-in key matrix scanning function.
	KO1~KO16 (Shared with SEG1~16)
	KI1~KI4. Can be defined as SEG23H~26H/IOB1~4 by code option.
13.	Built-in Serial Interface (UART/SPI/I2C).
	SDA,SCL,RXD,TXD  Can be defined as CX,RFC0~2/IOA1~4/ELC,ELP,BZB,BZ by code option.
	SIOX,SIOY,SCK,SSB Can be defined as RFC3~5,CX2/IOE1~4/ELC,ELP,BZB,BZ by code option.
14.	Three 6-bit programmable timers with programmable clock source.
	Read out the content in anytime
	Merge 2 or 3 timers into one 12-bit or 18-bit timer by STM instruction.
	Extend 1 timer as 12-bits timer by STE instruction.
	Used as a counter for RFC.
15.	Watchdog timer.
16.	Built-in voltage charge halver & pump circuit.
17.	Dual clock operation
	slow clock oscillation can be defined as X’tal or internal RC or external RC type oscillator by option.
	fast clock oscillation can be defined as 3.58MHz ceramic resonator, internal RC or external R type oscillator by option.
18.	HALT function.
19.	STOP function.
20.	Built-in Low Battery Detect.(2 type) & Comparator.
21.	Built-in Low Voltage Reset(2 type).
BLOCK DIAGRAM



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