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TM56F1542

Data Sheet
DS-TM56F1542_EV092.pdf

2023/9/1
User manual

Development Tools
TICE99

BLOCK DIAGRAM


FEATURES
1.ROM: 4K x 16 bits Flash Program Memory
2.EEPROM: 128 x 8 bits
3.RAM: 336 x 8 bits
4.STACK: 8 Levels
5.System Oscillation Sources (Fsys)
	Fast-clock: FIRC (Fast Internal RC, 18.432 MHz)
	Slow-clock: SIRC (Slow Internal RC, 50 KHz @VCC=5V )
6.System Clock Prescaler
	System Oscillation Sources can be divided by 1/2/4/8 as System Clock (Fsys)
7.Dual System Clock: FIRC+SIRC 
8.Power Saving Operation Mode
	FAST Mode: Fast-clock keeps CPU running , Slow-clock can be enabled/disabled
	SLOW Mode: Fast-clock is disabled, Slow-clock keeps CPU running
	IDLE Mode: Fast-clock and CPU stop. Slow-clock, T2, or Wake-up Timer keep running
	STOP Mode: All clocks stop, T2 and Wake-up Timer stop
9. 3 Independent Timers
	Timer0: 8-bit timer divided by 1~256 pre-scaler option, Reload/Interrupt/Stop function
	Timer1
8-bit timer divided by 1~256 pre-scaler option, Reload/Interrupt/Stop function
Overflow and Toggle out
	T2
15-bit timer with 4 interrupt interval time options
IDLE mode wake-up timer or used as one simple 15-bit time base
Clock source: Slow-clock (SIRC), Fsys/128
10.Interrupt
	Three External Interrupt pins
        1 pin is falling edge wake-up triggered & interrupts
     2 pins are rising or falling edge wake-up triggered & interrupt
	Timer0/Timer1/T2/WKT (wake-up) Interrupts
	ADC Interrupt 
	Touch Key Interrupt
	I2C Interrupt
	Pin Change Interrupt
	LVD Interrupt
11.Wake-up (WKT) Timer 
	Clocked by built-in RC oscillator with 4 adjustable interrupt times
        20.5 ms/41 ms/82 ms/164 ms @ Vcc=5V
12.Watchdog Timer
	Clocked by built-in RC oscillator with 4 adjustable reset times
164ms/328ms/655ms/1311ms @ Vcc=5V
	Watchdog timer can be disabled/enabled in STOP mode
13.PWM
	PWM0 :
16 bits, duty-adjustable, period-adjustable
Clock source: System clock(Fsys), FIRC (18.432MHz) or FIRC*2 (36.864MHz)
Complementary output (PWM0P, PWM0N), 4 output modes in total
Non overlap time durations adjustable: (0~15) * PWM CLK
	PWM1~5:
16 bits, duty-adjustable (Independent) , period shared with PWM0
Clock source shared with PWM0

14.Touch Key
	  One 5-channel Touch Key module, and One 8-channel Touch Key module
	  Each module include
          3-bit TK reference clock capacitor adjustment
          8-bit touch key clock frequency select(can be fixed frequency or auto change)
          14-bit TK scan length adjustment
	  Interrupt/Wake-up CPU while key is pressed.
15.I2C Interface
	Specific purpose slave I2C interface with interrupt function
16.12-bit ADC Converter with 10 input channels and 2 internal reference voltage
	Two Internal voltage channel: VBG or 1⁄4 Vcc
	ADC reference voltage: Vcc or VBG(2.50V)
17.All pin change wake up (negedge and posedge trigger)
18.Reset Sources
	Power On Reset/Watchdog Reset/Low Voltage Reset/External Pin Reset

19.Low Voltage Reset (LVR) /Low Voltage Detection Flag (LVD) Option:
	16-Level Low Voltage Reset: 2.05 - 4.15 V, can be disabled
	15-Level Low Voltage Detection Flag 2.28V - 4.15V, can be disabled
20.Operating Voltage 
	  Fsys= 1 MHz, LVR ~ 5.5V
	  Fsys=18.432 MHz, 2.5 ~ 5.5V
21.Operating Temperature Range : -40°C to + 85°C
22.Integrated 16-bit Cyclic Redundancy Check (CRC)
23.Table Read Instruction: 16-bit ROM data lookup table
24.Instruction set: 39 Instructions
25.Instruction Execution Time
	 2 system clocks (Fsys) per instruction except branch
26.I/O ports: Maximum 26 programmable I/O pins
	Open-Drain Output
	CMOS Push-Pull Output
	Schmitt Trigger Input with pull-up resistor option
	Support High sink mode and Constant current Drive mode
27.Programming connectivity support 4-wire (ICP) or 5-wire program
28.Page Locker Size: 512W/640W/768W …./2304W by 128 words step
29.Package Types:
	SOP-20/16


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