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TM52eF0C86

Data Sheet
DS-TM52eF0C86_85_EV091.pdf

3/11/2023
User manual
Development Documnets
AP Notes

Development Tools
T-Link-EV Board
TWR98/TWR99/TWR100/TWR100A

GENERAL DESCRIPTION
TM52 series eF0C86/85 are versions of a new, fast 8051 architecture for an 8-bit
microcontroller single chip with an instruction set fully compatible with industry 
standard 8051, and retains most 8051 peripheral’s functional block. Typically, 
the TM52 executes instructions six times faster than the standard 8051 architecture.
The TM52-eF0C86/85 provides improved performance, lower cost and fast time-to-
market by integrating features on the chip, including 64K/32K Bytes Flash program
memory, 4352 Bytes SRAM, Low Voltage Reset (LVR), Low Voltage Detector (LVD), 
dual clock power saving operation mode, 8051 standard UART and Timer0/1/2, 
real time clock Timer3, LCD/LED driver, 9 set 16-bit PWMs, 45 channels 12-bit A/D
Convertor, 2 group of 21 channels Touch Key, I2C/SPI interface and Watch Dog Timer.
It’s a high reliability and low power consumption feature can be widely applied in
consumer and home appliance products.
BLOCK DIAGRAM


FEATURES
1. Standard 8051 Instruction set, fast machine cycle
 Executes instructions six times faster than the standard 8051.
2. Flash Program Memory
 64K Bytes (TM52eF0C86)
 32K Bytes (TM52eF0C85)
 Support IAP “In Application Programming”
 Code Protection Capability
 100K erase times at least
 10 years data retention at least
3. Total 4352 Bytes SRAM (IRAM + XRAM)
 256 Bytes IRAM in the 8051 internal data memory area
 4096 Bytes XRAM in the 8051 external data memory area (accessed by MOVX Instruction)
4. Four System Clock type selections
 Fast clock from 1~16MHz Crystal (FXT)
 Fast clock from Internal RC (FRC, 18.432 MHz)
 Slow clock from 32768Hz Crystal (SXT)
 Slow clock from Internal RC (SRC,80 KHz)
 System Clock can be divided by 1/2/4/16 option
5. 8051 Standard Timer – Timer0/1/2
 16-bit Timer0, also supports T0O clock output for Buzzer application
 16-bit Timer1
 16-bit Timer2, also supports T2O clock output for Buzzer application
6. 15-bit Timer3
 Clock source can be selected as slow clock, FRC/512, slow clock/2 or FRC/1024
 Interrupt period can be clock divided by 65536/16384/4096/1024 option
7. UARTs
 UART0, 8051 standard UART
 UART1, supports only mode1 and mode3
 UART2, supports only mode1 and mode3
8. Nine 16 bits PWMs with period-adjustment
 Three 16 bits PWMs with independent period-adjustment (PWM0~PWM2)
 Six 16 bits PWMs with sharing period-adjustment (PWM30~PWM35)
 PWM2 with dead zone control
9. SPI Interface
 Master or Slave mode selectable
 Programmable transmit bit rate
 Serial clock phase and polarity options
 MSB-first or LSB-first selectable
10. I2C interface (Master / Slave)
11. 2 group of 21-Channel Touch Key (FTK)
12. 12-bit ADC with 42 channels External Pin Input and 2 channels Internal Reference Voltage
 Internal Reference Voltage: VBG 1.22V @VCC=5V~3V, 25℃
 Internal Reference Voltage: 1/4VCC
13. LCD Driver
 4x20 ~ 8x16 LCD driver
 1/3 LCD Bias
14. LED Controller/Driver
 Matrix mode (MX): 8*8, 16 pins up to 64 dots
 Dot matrix mode (DMX): 7*8、6*7、5*6、4*5, 8 pins up to 56 dots
15. 14 Sources, 4-level priority Interrupt
 Timer0/Timer1/Timer2/Timer3 Interrupt
 INT0~INT1 pin low level or falling edge Interrupt
 Port0/1/2/3/4/5 Pin Change Interrupt
 UART0/UART1/UART2 TX/RX Interrupt
 ADC/Touch Key Interrupt
 SPI Interrupt
 I2C interrupt
 PWM0/PWM1/PWM2/PWM3 interrupt
16. Pin Interrupt can Wake up CPU from Power-Down (Stop/Halt) mode
 Each pin can be defined as Interrupt & Wake-up pin (by pin change)
17. Max. 42 Programmable I/O pins
 CMOS Output
 Pseudo-Open-Drain, or Open-Drain Output
 Schmitt Trigger Input
 Pin Pull-up can be Enabled or Disabled
 All pin with High sink (60mA@VCC=5V,VOL=0.1VCC)
 COM pins have high sink current in LED mode (120mA@VCC=5V,VOL=0.1VCC)
18. Independent RC Oscillating Watch Dog Timer
 400ms/200ms/100ms/50ms selectable WDT timeout options
19. Five types Reset
 Power on Reset
 Selectable External Pin Reset
 Selectable Watch Dog Reset
 Software Command Reset
 Selectable Low Voltage Reset
20. 16-level Low Voltage Detect
 4.38V/4.3V/4.14V/4.06V/3.9V/3.82V/3.66V/3.58V/
3.42V/3.34V/3.18V/3.1V/2.94V/2.86V/2.7V/2.62V
21. 8-level Low Voltage Reset
 3.92V/3.68V/3.44V/3.20V/2.96V/2.72V/2.48V/2.24V
22. Five Power Operation Modes
 Fast/Slow/Idle/Stop/Halt mode
23. Integrated 16-bit Cyclic Redundancy Check function
24. Multiplication and division
 8 bit Multiplier & Divider (standard 8051)
 16 bits Multiplier & Divider
 32 bits ÷ 16 bits hardware Divider
25. On-chip Debug/ICE interface
 Use P3.0/P3.1, P3.4/P3.5, or P0.2/P0.3 pin
 Share with ICP programming pin
26. Writer interface
 Use P3.0/P3.1
27. Operating Voltage and Current
 VCC =2.3V ~ 5.5V @FSYSCLK=18.432MHz
 Icc<10uA @Vcc=3V, Halt mode, LCD On, 0.5S wakeup (timepiece current)
 ICC =11μA @Stop mode, VCC=5V
 ICC =4μA @Stop mode, VCC=3V
 ICC =180μA @Idle mode, VCC=5V
28. Operating Temperature Range
 –40°C ~ +105°C
29. Package Types
 44-pin LQFP
 SOP-28


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