FEATURES1. ROM: 2K x 14 bits MTP (Multi Time Programmable ROM)
2. RAM: 96 x 8 bits
3. STACK: 6 Levels
4. System Oscillation Sources (Fsys)
Fast-clock
- FIRC (Fast Internal RC): 1.5M/4M/6M/12MHz
Slow-clock
- SIRC (Slow Internal RC): 120KHz/30KHz/7.5KHz/1.875KHz
5. Dual System Clock
FIRC+SIRC
6. Power Saving Operation Mode
FAST Mode: Slow-clock can be disabled or enabled; Fast-clock keeps CPU running
SLOW Mode: Fast-clock can be disabled or enabled; Slow-clock keeps CPU running
IDLE Mode: Fast-clock and CPU stop. Slow-clock, T2, or Wake-up Timer keep running
STOP Mode: All Clocks stop, T2 and Wake-up Timer stop
7. 3 Independent Timers
Timer0
- 8-bit timer divided by 1~256 prescaler option, Counter/Interrupt/Stop function
Timer1
- 8-bit timer divided by 1~256 prescaler option, Reload/Interrupt/Stop function
- Overflow and Toggle out
T2
- 15-bit timer with 4 interrupt interval time options
- IDLE mode wake-up timer or used as one simple 15-bit time base
- Clock source: Slow-clock (SIRC), Fsys/128
8. Interrupt
Three External Interrupt pins
- 2 pins are falling edge wake-up triggered & interrupts
- 1 pin is rising or falling edge wake-up triggered & interrupt
Timer0/Timer1/T2/WKT (wake-up) Interrupts
9. Wake-up (WKT) Timer
Clocked by built-in RC oscillator with 4 adjustable interrupt times
- 17 ms/34 ms/68 ms/136 ms
10. Watchdog Timer
Clocked by built-in RC oscillator with 4 adjustable reset times
- 137 ms/274 ms/1096 ms/2192 ms
Watchdog can be disabled in IDLE/STOP mode (R15.5)
11. 2 Independent PWMs
PWM0:
- 8+2 bits, duty-adjustable, period-adjustable controlled PWM
- PWM0 clock source: Fast-clock or Fast-clock-pre(12MHz)*, with 1~64 prescaler
PWM1:
- 8+2 bits, duty-adjustable controlled PWM
- PWM1 clock source: Fast-clock or Fast-clock-pre*
*Note: Fast-clock-pre is the original fast clock, Fast-clock is the divided clock of Fast-clock-pre.
12. 12-bit ADC Converter with 11 input channels(CH0~CH10)
Internal reference voltage 1.25V ±2% on channel-11 when ADC reference source = VCC.
ADC reference voltage source: VCC or VBG 2.57V.
13. Built-in 1/2 bias VCC/2 voltage generator to PD3~PD0 maximum 4x13 dots for LCD display
14. Reset Sources
Power On Reset/Watchdog Reset/Low Voltage Reset/External Pin Reset
15. Four kinds of Low Voltage Reset option:
LVR2.0V, LVR2.0V(off in IDLE/STOP mode), LVR2.3V, LVR2.9V
16. Enhanced Power Noise Rejection
17. Operating Voltage: Low Voltage Reset Level to 5.5V
18. Operating Temperature Range:-40°C to +105°C
19. Table Read Instruction: 14-bit ROM data lookup table.
20. Instruction set: 38 Instructions
21. Instruction Execution Time
2 oscillation clocks per instruction except branch
22. I/O ports: Maximum 18 programmable I/O pins
Pseudo-Open-Drain Output (PA2~PA0)
Open-Drain Output
CMOS Push-Pull Output
Schmitt Trigger Input with pull-up resistor option
23. Programming connectivity support 6-wire (ISP) or 8-wire program.
24. Package Types:
20-pin DIP (300 mil), SOP (300 mil) , SSOP (150 mil),TSSOP(173mil) , QFN (3x3x0.75mm)
16-pin DIP(300 mil), SOP (150 mil) , SSOP (150mil)
14-pin SOP (150 mil)
10-pin MSOP (118 mil)
8-pin SOP (150 mil)
6-pin SOT23
25. Supported EV board on ICE
EV board: EV2781C